Nucleo429 no usb

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ST58
Posts: 16
Joined: Fri Mar 10, 2017 4:56 pm

Nucleo429 no usb

Post by ST58 » Fri Nov 10, 2017 4:12 pm

Nucleo429 port builds, but the usb functionality is not working. When plugged in brings up 'USB device not recognized '
Building the Nucleo 767 port does work as expected, so I know my build/flashing etc is all working

On the Nucleou429, USB not working, so no flash drive etc., but you can connect REPL using the 'stmlink' usb - which has a cdc connection to one of the target processor serial ports - so build is basically working.
Any one any ideas - or know where to start looking?

jickster
Posts: 73
Joined: Thu Sep 07, 2017 8:57 pm

Re: Nucleo429 no usb

Post by jickster » Sat Nov 11, 2017 1:05 am

ST58 wrote:Nucleo429 port builds, but the usb functionality is not working. When plugged in brings up 'USB device not recognized '
Building the Nucleo 767 port does work as expected, so I know my build/flashing etc is all working

On the Nucleou429, USB not working, so no flash drive etc., but you can connect REPL using the 'stmlink' usb - which has a cdc connection to one of the target processor serial ports - so build is basically working.
Any one any ideas - or know where to start looking?
This doesn’t belong here.

Development of micropython means modifying micropython somehow. You’re just trying to get usb to work so it doesn’t belong here.


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ST58
Posts: 16
Joined: Fri Mar 10, 2017 4:56 pm

Re: Nucleo429 no usb

Post by ST58 » Tue Nov 14, 2017 1:15 pm

Regardless of the unhelpful response, this is about developing micropython!
The reason the Nucleo429 port is 'broken' i.e no usb functionality, is due to a mistake in the board mpconfigboard.h file

The settings for the stm clock pll's are incorrect and the USB clock is being set at the wrong frequency. If you edit the the hw pll section with the following settings, then the sys clock will be at the max frequency for the '429 of 168Mhz and the usb clock will be at 48Mhz, using a HSE clock of 8Mhz...

Code: Select all

// HSE is 8MHz
//HSE is 8 Mhz so pllm = 8, plln = 336 and pllp = 2 gives hclk of 168Mz
// USB cllk needs to be 48Mhz and is derived from plln clk ( 336Mhz) 
// so pllq needs to be 7 making usb clk 336Mhz /7 = 48Mhz
#define MICROPY_HW_CLK_PLLM (8)
#define MICROPY_HW_CLK_PLLN (336)
#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)      
#define MICROPY_HW_CLK_PLLQ (7)
I will raise this as an issue on GitHub so the change can be merged into source control

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