USB requires a 48 MHz clock.
I suspect that the VCO is being set to a frequency that isn't an integer multiple of 48 and this causes the USB to drop.
One setup of PLL paramaters for the F4 with 8MHz HSE and 84 MHz CPU is:
#define MICROPY_HW_CLK_PLLM (8)
#define MICROPY_HW_CLK_PLLN (336)
#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV4)
#define MICROPY_HW_CLK_PLLQ (7)
VCO = HSE * PLLN/PLLM = 8 * 336 / 8 = 336 (which is between the limits of 100 and 432)
USB = VCO / PLLQ = 336 / 7 = 48.
CPU = VCO / PLLP = 336 / 5 = 84.
PLLP can only be 2, 4, 6, or 8.
Not all CPU frequencies can support a USB clock of 48 MHz.
Valid VCO frequencies (that support USB) would be 144, 192, 240, 288, 336, 384, 432
And the CPU frequencies will be one of those frequencies divided by 2, 4, 6, or 8.
Doing the math, these CPU frequencies: 18, 24, 30, 32, 36, 40, 42, 48, 54, 56, 60, 64, 72, and 84 should all work (using an 8MHz HSE) and have a way to get a 48 MHz USB clock. Choosing one of these CPU frequencies also requires a corresponding VCO that gives a USB frequency of 48 MHz.
Looking at the code, it looks like it tries to pick combinations that preserve the USB at 48 MHz, but obviously that will still only work for select frequencies.
That's the theory anyways.
When you switch frequencies, if there is a USB transaction happening, then it will most certainly fail (since the USB frequency will wind up momentarily not be 48 MHz while changing the frequency), and that may cause the USB connection to fail (perhaps drop) (I'm hypothesizing here since I haven't actually played with changing CPU frequencies on the fly).