ESP32 revision is reported when flashing the chip:
Code: Select all
Flashing binaries to serial port /dev/ttyUSB0 (app at offset 0x10000)...
esptool.py v2.1
Connecting....
Chip is ESP32D0WDQ6 (revision 1)
Uploading stub...
Running stub...
Stub running...
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RTC WDT reset is reported
only when reseting with RESET button. POWERON_RESET is detected, then there is Flash read error and the chip is reset by WDT.
Code: Select all
ets Jun 8 2016 00:22:57
rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
flash read err, 1000
ets_main.c 371
ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:6240
ho 0 tail 12 room 4
load:0x40078000,len:0
load:0x40078000,len:15660
entry 0x400790b4
....
....
Reset reason: RTC WDT reset
Interestingly,
when the board is reset by esp-idf monitor, the Poweron reset is reported. It looks like WDT reset is caused by some condition when only the reset (EN) pin is activated.
Code: Select all
--- idf_monitor on /dev/ttyUSB0 115200 ---
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---
ets Jun 8 2016 00:22:57
rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:6240
ho 0 tail 12 room 4
load:0x40078000,len:0
load:0x40078000,len:15660
entry 0x400790b4
....
....
Reset reason: Power on reset
Reset after deep sleep is reported correctly:
Code: Select all
>>> import machine
>>> machine.deepsleep(10000)
ESP32: DEEP SLEEP
ets Jun 8 2016 00:22:57
rst:0x5 (DEEPSLEEP_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:6240
ho 0 tail 12 room 4
load:0x40078000,len:0
load:0x40078000,len:15660
entry 0x400790b4
....
....
Reset reason: Deepsleep wake-up
Wakeup source: RTC wake-up
Also, the software reset is reported correctly:
Code: Select all
>>> import machine
>>> machine.reset()
ets Jun 8 2016 00:22:57
rst:0xc (SW_CPU_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:5904
ho 0 tail 12 room 4
load:0x40078000,len:0
load:0x40078000,len:13876
entry 0x40079070
I....
.....
Reset reason: Soft CPU reset