ADC timing problem.
Posted: Tue Jan 18, 2022 9:36 am
Hello.
I have a problem with the correct timing of the A / D converter. I would like a sampling rate of 20 kHz. According to the datasheet, I should clock the ADC with a frequency of 16 times higher. Using the spidev library that supports the SPI bus, I set the clock frequency to 360 kHz.
However, the measurements vary significantly. In one case, it receives the required number of periods, ie 10 (the sample table has a size of 4000). The next time there are many more periods, and there is also an uneven collection of samples.
Does the fault lie with the lack of stability of the clock?
It uses the MCP 3002 converter and the Raspberry Pi 3B + microcontroller.
I am enclosing diagrams of time courses below.
Example for a clock frequency of 360 kHz
https://ibb.co/C9vdCJV
Example for a clock frequency of 730kHz
https://ibb.co/4Yx5Wdq
https://ibb.co/xDLQX1B
https://ibb.co/82q9qPj
https://ibb.co/db5Q3hq
Greetings.
I have a problem with the correct timing of the A / D converter. I would like a sampling rate of 20 kHz. According to the datasheet, I should clock the ADC with a frequency of 16 times higher. Using the spidev library that supports the SPI bus, I set the clock frequency to 360 kHz.
However, the measurements vary significantly. In one case, it receives the required number of periods, ie 10 (the sample table has a size of 4000). The next time there are many more periods, and there is also an uneven collection of samples.
Does the fault lie with the lack of stability of the clock?
It uses the MCP 3002 converter and the Raspberry Pi 3B + microcontroller.
I am enclosing diagrams of time courses below.
Example for a clock frequency of 360 kHz
https://ibb.co/C9vdCJV
Example for a clock frequency of 730kHz
https://ibb.co/4Yx5Wdq
https://ibb.co/xDLQX1B
https://ibb.co/82q9qPj
https://ibb.co/db5Q3hq
Greetings.