Filesystem size with custom STM32F7 build

[TravisT]

Thank you for clarifying, and that makes a lot of sense. I knew that only a certain portion of the sector could be used but did not realize that it could not jump over that, which now seems obvious.

It also makes sense now why I kept seeing the additional filesystem segment, and why it was typically at the end at the end of the flash.

Luckily I have the 2MB chip and that I could add the second segment easily. I hope the 128k buffer works because that helps significantly to utilize the flash that is there.

I will try this and see what happens. I can handle not getting all the space I was hoping for, but I want to at least know why it is doing what it is doing.

[untitled]

Travis did you succeed with increasing filesystem size?
Could you please share your changes?

I have been working on updating the filesystem flash size based on the nucleo STM32F767 build. I get it to recognize (show is free using an os) a larger filesystem, but unlike my efforts with the STM32F405 edits I get file corruption when passing the 96k threshold (default build filesystem size).

I realize this might be something simply I do not understand or simple and I am overlooking it. The device runs with this code and only noticed it when I pass the 96k threshold and the files show a bunch of "……" (see below).

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  if counter>=600:
   (t0,t1)=(t1,utime.ticks_ms…………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………

Below are the main edits I have done to try to grow the filesystem portion of the flash, and utilize more of the flash as a hole. The actual micropython firmware I am trying to push further down in the flash to take up the larger 256k segments and letting the filesystem to be in the smaller sectors and continues.

In flashdev.c I changed the seg1 number of blocks. I am not totally sure why the sector size is 32k and not 64k like on most of the other devices.

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#elif defined(STM32F746xx) || defined(STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx)

// The STM32F746 doesn't really have CCRAM, so we use the 64K DTCM for this.

#define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 64k
#define FLASH_SECTOR_SIZE_MAX (0x08000) // 32k max
#define FLASH_MEM_SEG1_START_ADDR (0x08008000) // sector 1
#define FLASH_MEM_SEG1_NUM_BLOCKS (576) // sectors 1,2,3,4,5,6: 32k+32k+32k+64/128+64/256+64/256 = 288

Also in flash.c I increased the flash bank size on the last entry from 3 to 7 to utilize all the banks.

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#elif defined(STM32F7)

// FLASH_FLAG_PGSERR (Programming Sequence Error) was renamed to
// FLASH_FLAG_ERSERR (Erasing Sequence Error) in STM32F7
#define FLASH_FLAG_PGSERR FLASH_FLAG_ERSERR

static const flash_layout_t flash_layout[] = {
    { 0x08000000, 0x08000, 4 },
    { 0x08020000, 0x20000, 1 },
    { 0x08040000, 0x40000, 7 },
};

In the board mpconfigboard.mk I changed TEXT1_ADDR to a higher number to make room for the expanded filesystem.

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MCU_SERIES = f7
CMSIS_MCU = STM32F767xx
MICROPY_FLOAT_IMPL = double
AF_FILE = boards/stm32f767_af.csv
LD_FILES = boards/stm32f767.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x080C0000

I also updated the stm32f767.ld linker script to update the location and length of the filesystem and FLASH_TEXT.

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/* Specify the memory areas */
MEMORY
{
    FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1024K
    FLASH_ISR (rx)  : ORIGIN = 0x08000000, LENGTH = 32K     /* sector 0, 32K */
    FLASH_APP (rx)  : ORIGIN = 0x08008000, LENGTH = 2016K   /* sectors 1-11 3x32K 1*128K 7*256K */
    FLASH_FS (r)    : ORIGIN = 0x08008000, LENGTH = 288K     /* sectors 1, 2, 3 (32K each) */
    FLASH_TEXT (rx) : ORIGIN = 0x080C0000, LENGTH = 1280K   /* sectors 4-7 1*128Kib 3*256KiB = 896K */
    DTCM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K    /* Used for storage cache */
    RAM (xrw)       : ORIGIN = 0x20020000, LENGTH = 384K    /* SRAM1 = 368K, SRAM2 = 16K */
}

The MCU has 12 flash sectors in what I believe is the default single bank mode.
4x 32
1x 128
7x 256

What might I be missing or doing wrong? The STM32F405 is working with much less modification. I did use Dfuse to erase the flash before updating to try to reduce possibilities of corruption from other methods (dfu-util with mass erase does not seem to work with the STM32F7).

Thanks for any help

[TravisT]

I will have to dig into my notes. There has been some changes to how this is done since I worked on this, luckily I think it is simpler, but I found that relying on the external flash was simpler and much more stable. Damien mentioned one of his motivations was that external flash devices are made to be written and re-written while MCU internal flash not so much.

I do keep with the F767 chip which has 2MB of flash which I leave for frozen libraries (also a good route for saving filesystem space and recently made much much easier) then I have the filesystem external on 2MB. No issues with both frozen and filesystem size right now.

I am thinking I should make a dev board based on my common layout so that I can put it into the project boards folder and keep it updated for a "app note".

Just so you know I still very much use the F767 (will eventually move to the H743) I just have not though about it much since it worked.

[untitled]

I would like to stick with internal flash for now but i need 200-300 kb of it.
Let me know if you will find something usefull.

[TravisT]

Hello,

Understood about you wanting it internal. In the case cost was the issue, the external flash is cheap relative. The one I use is $0.56 for single units.
https://www.digikey.com/product-detail/ ... ND/6124886

The biggest problem I ran into is that your sectors need to be continuous and once you cannot fill a whole block that was the end. And the F767 has either very small or very big sectors. The limiting factor is the buffer size which I think is 64k or 128k on the F767. Micropython added the ability to have a segment usually used at the end of the flash space.

Graphic of the F767 flash
https://www.dropbox.com/s/yrgd71t9bo75i ... h.jpg?dl=0

Sorry digging through notes while also trying to keep up with work.

[untitled]

I am using Nucleo dev board so no options to add external flash.
Later i will be building my own pcb so i'll think about external flash.

Travis, do i get i right that you moved to external flash and didn't find a way to resize internal flash filesystem?

[TravisT]

Understood,

I have and you definitely can extend flash. At first glance on the flash layout you should be able to get at least another 128k out of it.

I have forgotten to push this in the past but to keep thing "generic" there was no special cases for the larger flash F767 devices so they are not as utilized. There is enough variations in the F7 I think Damien did "one size fits most" on some settings.

Starting at line 60 in this flash.c file on in the master branch you would either add a case for the F767, or edit the default.
https://github.com/micropython/micropyt ... 32/flash.c

Then you would edit the layout which is mostly for reference in this file
https://github.com/micropython/micropyt ... m32f767.ld

Starting at line 96 in flashbdev.c you can modify some more of the settings. I think the 32k buffer can be changed to 64 in your MCU. You can also change the arrangement. I think in the past I played with a separate case for the F767 here also since has more resources.
https://github.com/micropython/micropyt ... lashbdev.c

[untitled]

Thanks for an answer Travis!

I have found similar information in viewtopic.php?f=3&t=3702&p=22627&p22627#p22612
I have tried it but without any luck.

I have no clue what those values are in flash.c file. First element (f.e. 0x08000000) should be address, second could be length, but what is third element? And what represents each of 4 groups?

Memory layout in stm32h743.ld is mystery to me also. What is FLASH_ISR and FLASH_TEXT? How do I find address and length for each of them?

I tried to play with those numbers but every time i build new firmware, i get the same 81 KB flash size.
I would expect at least build to fail or crash mcu with wrong values.

I tried st-flash erase, make clean and did filesystem reset as per http://docs.micropython.org/en/latest/p ... boot-modes

[TravisT]

Can you confirm exactly which nucleo board and MCU part number? I can look into this more specifically for your MCU which might be a little different than the F767.

ISR is the interrupt service routine
TEXT if I remember correctly the filesystem

The manual will have more details than the datasheet which you might have to look for.

Sorry my help will be in chunks but I know it is possible to get what you want.

[untitled]

Here is my board https://www.st.com/en/evaluation-tools/ ... 767zi.html
It has a STM32F767ZI mcu.

MCU datasheet didn't had much about flash but I found this doc https://www.st.com/resource/en/applicat ... ronics.pdf
As my F767 has 2MB dual bank, I guess the required sectors are defined on page #18.
As it's dual bank, things getting even less clear to me.

So here is what i have found out so far (please correct me if i am wrong).

Memory table as i understand it (note two sheets for dual and single bank):
https://docs.google.com/spreadsheets/d/ ... sp=sharing

As my MCU has dual bank memory, I think numbers in stm32f767.ld file does not utilize 2 MB.

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FLASH on line #8 has correct starting address 0x08000000 and correct LENGTH of 2048K.
FLASH_ISR uses sector 0 but it should be 16K for dual bank? Looks like 32K is for single bank flash
FLASH_APP uses 1-11 sectors but for dual bank it would be 1008K not 2016K so I guess it's also for single bank.
FLASH_FS uses 1-3 sectors and LENGTH is 96K so it's also for single bank.
FLASH_TEXT uses sectors 4-7 so it's also for single bank.

What happens with sectors 8-11? Are they unused? Why?

Possibly I should adjust ORIGIN and LENGTH to match dual bank, so here are my guesses:

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FLASH - the same
FLASH_ISR - should I use 0-1 sectors to make it 32K? Would it be better to use 0-3 sectors to make it 64K?
FLASH_APP - ORIGIN after FLASH_ISR; LENGTH - to sector 23?
FLASH_FS - ORIGIN same as FLASH_APP; LENGTH?
FLASH_TEXT - ORIGIN after FLASH_FS; LENGTH - till end of FLASH_APP?

There is a note on https://github.com/micropython/micropyt ... board.h#L1

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// Note: if the board shows odd behaviour check the option bits and make sure nDBANK is
// set to make the 2MByte space continuous instead of divided into two 1MByte segments.

How to set it?

Next file flashbdev.c has these definitions:

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#elif defined(STM32F746xx) || defined(STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx)

// The STM32F746 doesn't really have CCRAM, so we use the 64K DTCM for this.

#define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 64k
#define FLASH_SECTOR_SIZE_MAX (0x08000) // 32k max
#define FLASH_MEM_SEG1_START_ADDR (0x08008000) // sector 1
#define FLASH_MEM_SEG1_NUM_BLOCKS (192) // sectors 1,2,3: 32k+32k+32=96k

I can't find anywhere cache memory start address.
FLASH_SECTOR_SIZE_MAX is 256K but should be 64K because of cache size?
No ideas about FLASH_MEM_SEG1_NUM_BLOCKS.

In viewtopic.php?f=3&t=3702&p=22627&p22627#p22612 Drako defines SEG2:

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#define FLASH_MEM_SEG2_START_ADDR (0x08100000) // sector 8
#define FLASH_MEM_SEG2_NUM_BLOCKS (256) // sector 8,9,10,11: 4*32k=128k

What happens next? Is it appended to SEG1?

And the last part in file flash.c:

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static const flash_layout_t flash_layout[] = {
    { 0x08000000, 0x08000, 4 }, // start of bank1? 32K stands sector size? 4 sectors of this size?
    { 0x08020000, 0x20000, 1 }, // 1 sector with 128K
    { 0x08040000, 0x40000, 3 }, // 3 sectors with 256K; why only 3 not 7?
    { 0x08100000, 0x40000, 4 }, // start of bank2; remaining 4 sectors?
};

If my MCU has dual bank, shouldn't here be defined both banks separately?

Sorry for a long post. Any help appreciated.