@micropython.asm_thumb PYBD SF6W F64 FPU

The official PYBD running MicroPython, and its accessories.
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MEEE19
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@micropython.asm_thumb PYBD SF6W F64 FPU

Post by MEEE19 » Wed Oct 14, 2020 3:11 am

Is there support for the SF6W double precision F64 FPU operation mode in the inline assembler?
Out of the box it will not run the code the same as PYBv1.1. (No surprise) It looks like ...array('f' ,[... gives double precision values.
Any guidance or documentation? There probably is a way to force F32 mode but my curiosity is more in the new F64 possibilities...

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pythoncoder
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Re: @micropython.asm_thumb PYBD SF6W F64 FPU

Post by pythoncoder » Wed Oct 14, 2020 7:09 am

If array('f', [... gives double precision values this is surely a bug - see the CPython docs. I'll investigate and report back/raise an issue.

I'm 99% certain that the inline assembler still only supports 32 bit floats.

On a very general point in many applications it's debatable whether the inline assembler is the best way to go. We now have dynamically loadable C modules and there is some evidence that these can be faster than the inline assembler. Some six years ago I wrote this DFT module using inline assembler. In recent testing the DFT in ulab proved faster by a substantial margin. My assembler code was optimised for ease of writing rather than performance, but equalling the performance of ulab would take a lot of effort; for what purpose?

C compilers are highly optimised these days.
Peter Hinch

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I think the array is correct on SF6W

Post by pythoncoder » Wed Oct 14, 2020 7:37 am

OK, I've tested this with the following which adds the first two elements of an array of floats. I ran this on an SF6W:

Code: Select all

@micropython.asm_thumb
def asm_add(r0):
    ldr(r1, [r0, 0])
    ldr(r2, [r0, 4])  # Note the assumption of a 4 byte element size
    vmov(s1, r1)
    vmov(s2, r2)
    vadd(s0, s1, s2)
    vcvt_s32_f32(s0, s0)
    vmov(r0, s0)
The code was designed to fail if array elements were not 4 bytes in size.

Tested as follows:

Code: Select all

>>> from array import array
>>> a = array('f', [1,2,3,4])
>>> asm_add(a)
3
Peter Hinch

MEEE19
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Re: @micropython.asm_thumb PYBD SF6W F64 FPU

Post by MEEE19 » Thu Oct 15, 2020 4:24 pm

Thanks for the feedback and testing... and sharing your DFT on github.
Based on your test coding my pyb1.1 code should be close to working.
For me the purpose is mental gymnastics. Microprocessor programming is a hobby, work as ME but educated in EE and controls (1970s).
Secondary purpose has been to see how capable the pyboard can be at DSP and State Space processing.
The micropython inline assembler made "bare metal" FPU coding easy, quick to write and debug. Impressive processing speed at 168MHz.
This is a great tool for teaching assembler programming.
Compiling into modules and importing to micropython is something for me to learn... I have been reviewing that documentation.
ulab code should also be interesting to review...

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Re: @micropython.asm_thumb PYBD SF6W F64 FPU

Post by pythoncoder » Fri Oct 16, 2020 8:01 am

You might also be interested in micropython-filters: a way to implement FIR filters with coefficients computed using an online utility.

The STM instruction set includes DSP-oriented opcodes. I've yet to investigate this. It is possible (though a PITA) to use the data directive to insert unsupported opcodes in the assembler. I did this to experiment with the floating point instructions before submitting a PR to provide mnemonic support. It would be interesting to do this with the DSP stuff...
Peter Hinch

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