Porting Mirocpython to Risc V ?

C programming, build, interpreter/VM.
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Porting Mirocpython to Risc V ?

Post by eduardo » Thu Oct 22, 2015 9:42 am

We got a small FPGA reserarch project funded. We consider running Micropython on a Risc V core on an FPGA.

Having micropython as an interpreter would make things easy on the higher levels.

We do our own Lattice based FPGA board with Flash and Memory and interfaces, so we are flexible
on that side.

Is someone here interested in porting micropython to the Risc V architecture?

We even would pay some money.

Description of Risc-V and gnu tools you can find at http://riscv.org/

I hope to hear from you.

The ultimate goal of the funded project is an FPGA based IoT gatway with a lot of very flexible interfaces (mostly PMOD modules) taken care
in the FPGA handling. (think micropython board on interface steroids)


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Re: Porting Mirocpython to Risc V ?

Post by pfalcon » Thu Oct 22, 2015 11:24 am

Seeing the title, I thought maybe RiscV is available in ASIC silicon already? Well, FPGA sounds good too, as well as IoT related project. I'd be interested!
Awesome MicroPython list
Pycopy - A better MicroPython https://github.com/pfalcon/micropython
MicroPython standard library for all ports and forks - https://github.com/pfalcon/micropython-lib
More up to date docs - http://pycopy.readthedocs.io/

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Re: Porting Mirocpython to Risc V ?

Post by tdabboud » Fri Oct 30, 2015 10:06 pm

This sounds really interesting. I haven't worked with FPGA's in a couple years, but I would be interested in helping out.

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Re: Porting Mirocpython to Risc V ?

Post by ALU » Mon Nov 21, 2016 1:30 pm

hello, i have the same requirement just like you. I am wondering have you already solve this problem? if so, can I have your result? I am trying to find the way but i can't.

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Re: Porting Mirocpython to Risc V ?

Post by slush » Wed Apr 26, 2017 10:08 am

FYI, there's first RISC-V ASIC on market: https://www.sifive.com/products/freedom-e310/

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Re: Porting Mirocpython to Risc V ?

Post by kak » Tue Oct 30, 2018 10:22 am

You may have seen this: https://hackaday.com/2018/10/08/new-par ... -networks/


Now, with cheap Risc-V boards at the gates (https://item.taobao.com/item.htm?id=578484113485), it would be a shame if we couldn't get Micropython for them.

There's FreeRTOS already available for the K210 chips, so this might be the best way to go.

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Re: Porting Mirocpython to Risc V ?

Post by talosthoren » Tue Nov 26, 2019 6:50 pm

I'm also trying to figure out how to get started on this for the FE310-G002 on the hifive1-revb board. Learning how to use their metal libraries now, but having some difficulty understanding how to integrate micropython with their build tools in order to get the minimal port running.

I would love to see the example posted on github for lofive, but it seems to 404 for some time now. Anyone have any experience porting micropython to completely new MCU's have any insight they can share?

[Edit]: I've since discovered that the broken link I've been following still belongs to a reachable repository: https://github.com/mmicko/micropython

Thanks to the author for getting this far! The experimental branch actually has code that supports the entire freedom-e-sdk. This is a solid start, for my purposes.

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Re: Porting Mirocpython to Risc V ?

Post by jimmo » Wed Nov 27, 2019 12:25 am

Not sure if useful but I know the FuPy team have been working a lot on riscv support for MicroPython -- https://fupy.github.io/

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Re: Porting Micropython to Risc V ?

Post by rdbrown0au » Fri Feb 19, 2021 5:59 am

The recent release of the Espressif ESP32-C3 will raise interest in this.
[Product page](https://www.espressif.com/en/products/socs/esp32-c3)
[Datasheet](https://www.espressif.com/sites/default ... eet_en.pdf)

Espessif in it's ESP32-S2 includes an RV32IMC 8Mhz 8kB processor that can be used in deep sleep mode
and has announced the ESP32-C3 series as an ESP8266 upgrade path.
RV32IMC ISA, up to 160MHz. 384KB ROM, 400KB SRAM, 8KB RTC Memory (works in Deep-Sleep mode) 4 Kbit of efuse
I'd guess the ESP32-C3 micropython version would have a lot more headroom. It would be interesting to see
what the ROM will have.

https://hackaday.com/2021/02/08/hands-o ... w-esp8266/
[ESP32-C3-DevKitM-1, ESP32-C3-DevKitC-1](https://www.espressif.com/en/products/devkits)
https://github.com/espressif/esp-idf/tr ... ts/esp32c3 might give hints as to what is in ROM

The port to the SiFive LoFive board may assist, the -C3 is lacking Atomic instructions, but should have the same instructions otherwise.

https://github.com/mmicko/micropython/b ... ts/lofive/

There is a port for the Canaan Kendryte K210 (RV64GC) by Boris Lovosevic
This might be on top of the FreeRTOS Kendryte provide.
The dual core 8Mb K210 lacks a Linux compatible MMU, but an FDPIC Linux implementation is available for it.
I'd guess that Unix MicroPython would build for that.

Damien Le Moal's work on this, includes a full Device tree description of the K210.
http://lists.infradead.org/pipermail/li ... 04796.html
[PATCH v19 10/17] riscv: Update Canaan Kendryte K210 device tree

The Zephyr RTOS is using Device tree for describing architectures and boards, but currently only has ESP32 (Xtensa) data.
Would generating the relevant parts of Micropython's source from Device tree descriptions be a useful way to port?

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