Dear all,
I am currently working on the PowerPC architecture, so on the MPC5xx family provided by NXP. Recently I discovered the micropython and I was thinking about the port of micropython on this microcontroller.
Honestly, I am not an expert about virtual machine in general, so I would need some hint before to start to work about this port.
Do you think that it would be feasible? Starting from the "minimal" version of the microcropython, what should I change, add and modify?
I noticed that all ports concern the ARM architecture, so my idea is to work mainly with the cross-compiler, loading directly on the microcontroller the .mpy bytecode.
Thank you very much,
P
[MPC5xx] PowerPC Architecture Port
Re: [MPC5xx] PowerPC Architecture Port
MicroPython is highly portable and has (unofficial) motto of "MicroPython runs everywhere", so we welcome people to do the ports .
By number, the majority of board ports are ARM, which mirrors the general state of the industry, but for example 2 actively developed ports are for Xtensa architecture.
Indeed, you would start with ports/minimal/ , just as the project README suggest. You need to implement just UART rx/tx functions to get the port working.
Btw, I'd recommend to move this topic to general "Development" forum - ports to new architectures should go there (ports to specific MCUs/boards should go to "Other boards" indeed).
By number, the majority of board ports are ARM, which mirrors the general state of the industry, but for example 2 actively developed ports are for Xtensa architecture.
Indeed, you would start with ports/minimal/ , just as the project README suggest. You need to implement just UART rx/tx functions to get the port working.
Btw, I'd recommend to move this topic to general "Development" forum - ports to new architectures should go there (ports to specific MCUs/boards should go to "Other boards" indeed).
Awesome MicroPython list
Pycopy - A better MicroPython https://github.com/pfalcon/micropython
MicroPython standard library for all ports and forks - https://github.com/pfalcon/micropython-lib
More up to date docs - http://pycopy.readthedocs.io/
Pycopy - A better MicroPython https://github.com/pfalcon/micropython
MicroPython standard library for all ports and forks - https://github.com/pfalcon/micropython-lib
More up to date docs - http://pycopy.readthedocs.io/
Re: [MPC5xx] PowerPC Architecture Port
Thanks for the fast reply. Ok, I don't think that I can move this post, but I will start a new topic in the Development forum
Re: [MPC5xx] PowerPC Architecture Port
Moved.
Awesome MicroPython list
Pycopy - A better MicroPython https://github.com/pfalcon/micropython
MicroPython standard library for all ports and forks - https://github.com/pfalcon/micropython-lib
More up to date docs - http://pycopy.readthedocs.io/
Pycopy - A better MicroPython https://github.com/pfalcon/micropython
MicroPython standard library for all ports and forks - https://github.com/pfalcon/micropython-lib
More up to date docs - http://pycopy.readthedocs.io/
Re: [MPC5xx] PowerPC Architecture Port
Ok, now that the topic is in the right place I think I can start the discussion
My idea is to firstly develop the simplier micropython version on the PowerPC architecture. This means that the first port would not include the on-board compiler, but just the virtual machine, able to execute a .mpy bytecode. If I understood well, the REPL communication feature would be excluded from this first port, because it needs the on-board compiler.
Basically for the first port it would be like:
write a .py code -> compile with the cross compiler, getting the .mpy file -> load the .mpy on the flash memory through CAN/SPI/other way -> directly execute the .mpy code.
I don't know if it is possible to work only with the VM without using REPL and on-board compiler, but this is my basic idea. What do you think about?
Anyway, this afternoon I will start to study the port on not-ARM architectures.
Thank you
My idea is to firstly develop the simplier micropython version on the PowerPC architecture. This means that the first port would not include the on-board compiler, but just the virtual machine, able to execute a .mpy bytecode. If I understood well, the REPL communication feature would be excluded from this first port, because it needs the on-board compiler.
Basically for the first port it would be like:
write a .py code -> compile with the cross compiler, getting the .mpy file -> load the .mpy on the flash memory through CAN/SPI/other way -> directly execute the .mpy code.
I don't know if it is possible to work only with the VM without using REPL and on-board compiler, but this is my basic idea. What do you think about?
Anyway, this afternoon I will start to study the port on not-ARM architectures.
Thank you