I realize this might be something simply I do not understand or simple and I am overlooking it. The device runs with this code and only noticed it when I pass the 96k threshold and the files show a bunch of "……" (see below).
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if counter>=600:
(t0,t1)=(t1,utime.ticks_ms…………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………………
In flashdev.c I changed the seg1 number of blocks. I am not totally sure why the sector size is 32k and not 64k like on most of the other devices.
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#elif defined(STM32F746xx) || defined(STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx)
// The STM32F746 doesn't really have CCRAM, so we use the 64K DTCM for this.
#define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 64k
#define FLASH_SECTOR_SIZE_MAX (0x08000) // 32k max
#define FLASH_MEM_SEG1_START_ADDR (0x08008000) // sector 1
#define FLASH_MEM_SEG1_NUM_BLOCKS (576) // sectors 1,2,3,4,5,6: 32k+32k+32k+64/128+64/256+64/256 = 288
Also in flash.c I increased the flash bank size on the last entry from 3 to 7 to utilize all the banks.
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#elif defined(STM32F7)
// FLASH_FLAG_PGSERR (Programming Sequence Error) was renamed to
// FLASH_FLAG_ERSERR (Erasing Sequence Error) in STM32F7
#define FLASH_FLAG_PGSERR FLASH_FLAG_ERSERR
static const flash_layout_t flash_layout[] = {
{ 0x08000000, 0x08000, 4 },
{ 0x08020000, 0x20000, 1 },
{ 0x08040000, 0x40000, 7 },
};
In the board mpconfigboard.mk I changed TEXT1_ADDR to a higher number to make room for the expanded filesystem.
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MCU_SERIES = f7
CMSIS_MCU = STM32F767xx
MICROPY_FLOAT_IMPL = double
AF_FILE = boards/stm32f767_af.csv
LD_FILES = boards/stm32f767.ld boards/common_ifs.ld
TEXT0_ADDR = 0x08000000
TEXT1_ADDR = 0x080C0000
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/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0, 32K */
FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 2016K /* sectors 1-11 3x32K 1*128K 7*256K */
FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 288K /* sectors 1, 2, 3 (32K each) */
FLASH_TEXT (rx) : ORIGIN = 0x080C0000, LENGTH = 1280K /* sectors 4-7 1*128Kib 3*256KiB = 896K */
DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */
RAM (xrw) : ORIGIN = 0x20020000, LENGTH = 384K /* SRAM1 = 368K, SRAM2 = 16K */
}
4x 32
1x 128
7x 256
What might I be missing or doing wrong? The STM32F405 is working with much less modification. I did use Dfuse to erase the flash before updating to try to reduce possibilities of corruption from other methods (dfu-util with mass erase does not seem to work with the STM32F7).
Thanks for any help
